Synopsys Hiring for Intern (Technical-Engineering) Job at Noida Full Time

31257BR

INDIA – Noida

Engineer will be responsible for designing, developing, troubleshooting, or debugging synthesizable memory models for emulation .
Skill set required:

• Strong Verilog coding skills
• Strong debugging skills
• Perl or python scripting skills
• Knowledge on FPGA Architectures
• Knowledge of c/C++ is an advantage
• Knowledge of memory Protocol like flash memory models/DDR/LPDDR/HBM families is added advantage
• Highly skilled with one or more industry standard simulation tools Synopsys VCS, Verdi
• Strong understanding of typical design structures (FIFO’s, pipelines, memories, state machines, etc.)

Fast leaner, comfortable and confident interacting with architects

Interns/Temp

India

Interns

Intern